View ACPL-5601L-100_1956676.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

features ? ? low ? power? consumption ? ? 3.3v ?supply? voltages ? ? dual ? marked?with? device? part?number?and? dscc? drawing ?number ? ? manufactured ?and? tested?on?a? mil-prf-38534 ? certifed ?line ? ? qml-38534, ?class?h?and?k ? ? three ? hermetically?sealed? package? confgurations ? ? performance ? guaranteed? over?full? military ? temperature ? range:?-55c? to?+125c?????????????????????? ? ? high ?speed:?10?mbd? typical ? ? cmr: ?>?10,000? v/s? typical ? ? 1500 ? vdc ?withstand? test? voltage ? ? ttl ? circuit? compatibility ? ? hcpl-260l/060l/263l/063l ? function? compatibility applications ? ? military ?and? aerospace ? ? high ? reliability? systems ? ? transportation, ? medical,?and? life? critical? systems ? ? line ? receiver ? ? voltage ? level? shifting ? ? isolated ?input?line? receiver ? ? isolated ?output?line? driver ? ? logic ? ground? isolation ? ? harsh ? industrial? environments ? ? isolation ? for? computer,? communication,?and? test? equipment ? systems caution: it is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by esd. the connection of a 0.1 f bypass capacitor between v cc and gnd is recommended. acpl-267xl, acpl-268kl, acpl-560xl, acpl-563xl, 5962-08242* hermetically sealed, 3.3v high speed, high cmr, logic gate optocouplers data sheet *see ? selection?guide? for?full? matrix?of? part? numbers. description these ? units? are ? single? and? dual? channel, ? hermetically ? sealed? optocouplers. ? the ? products ? are ? capable? of? opera - tion? and? storage ? over ? the? full? military ? temperature ? range ? and? can? be? purchased ? as? either? standard ? commercial ? product ? or? with? full? mil-prf-38534 ? class? level ? h? or? k? testing ? or? from ? dscc ? drawing ? 5962-08242.? all ? devices ? are ? manufactured ? and? tested ? on? a? mil-prf-38534 ? certi - fed? line? and? are ? included? in? the? dscc ? qual ifed? manu - facturers ?list? qml-38534? for? hybrid? microcircuits.? truth table (positive ? logic) multichannel devices input output on?(h) l of ?(l) h single channel dip input enable output on?(h) h l of ?(l) h h on?(h) l h of ?(l) l h functional diagram multiple ?channel? devices? available v c c v o u t v e g n d
2 each? channel? contains ? a? gaasp ? light ? emitting? diode? which? is? optically? coupled ? to ? an? integrated ? high? speed? photon ? detector. ? the ? output? of? the? detector ? is? an? open? collector ? schottky ? clamped? transistor. ? internal ? shields? pr o vide? a? guaranteed ? common ? mode? transient ? immu - nity ? specifcation ? of? 1000? v/s. ? package ? styles ? for ? these? parts ? are ? 8? and? 16? pin? dip? through ? hole? (case? outlines? p? and? e? respectively). ? devices ? may ? be? purchased ? with? a? variety ? of? lead? bend? and? plating ? options. ? see ? selection ? guide? table ? for ? details. ? standard ? microcircuit ? drawing ? (smd) ? parts ? are ? available ? for ? each? package ? and? lead? style. because ? the? same? electrical ? die? (emitters ? and? detectors) ? are ? used? for ? each? channel? of? each? device ? listed ? in? this? data ? sheet, ? absolute ? maximum? ratings, ? recommended ? operating ? conditions, ? electrical ? specifcations, ? and? per - formance ? characteristics ? shown ? in? the? fgures ? are ? iden - tical? for ? all? parts. ? occasional ? exceptions ? exist ? due? to ? package ? variations ? and? limitations, ? and? are ? as? noted. ? additionally, ? the? same? package ? assembly? processes ? and? materials ? are?used?in?all? devices.? selection guide C package styles and lead confguration options package 16 pin dip 8 pin dip 8 pin dip lead ? style through ?hole through ?hole through ?hole channels 2 1 2 common ?channel? wiring vcc, ?gnd none vcc, ?gnd withstand ? test ? voltage 1500? vdc 1500? vdc 1500? vdc avago ? part?#?&?options standard ? commercial acpl-2670l acpl-5600l acpl-5630l mil-prf-38534, ?class?h acpl-2672l acpl-5601l acpl-5631l mil-prf-38534, ?class?k acpl-268kl acpl-560kl acpl-563kl standard ? lead? finish gold ? plate gold ? plate gold ? plate solder ?dipped* option?-200 option?-200 option?-200 butt? cut/gold? plate option?-100 option?-100 option?-100 gull? wing/soldered* option?-300 option?-300 option?-300 class?h?smd? part?# prescript ? for?all? below 5962- 5962- 5962- either? gold?or? solder 0824203hex 0824201hpx 0824202hpx gold ? plate 0824203hec 0824201hpc 0824202hpc solder ?dipped* 0824203hea 0824201hpa 0824202hpa butt? cut/gold? plate 0824203huc 0824201hyc 0824202hyc butt? cut/soldered* 0824203hua 0824201hya 0824202hya gull? wing/soldered* 0824203hta 0824201hxa 0824202hxa class?k?smd? part?# prescript ? for?all? below 5962- 5962- 5962- either? gold?or? solder 0824203kex 0824201kpx 0824202kpx gold ? plate 0824203kec 0824201kpc 0824202kpc solder ?dipped* 0824203kea 0824201kpa 0824202kpa butt? cut/gold? plate 0824203kuc 0824201kyc 0824202kyc butt? cut/soldered* 0824203kua 0824201kya 0824202kya gull? wing/soldered* 0824203kta 0824201kxa 0824202kxa *? solder? contains? lead.
3 outline drawings 16 pin dip through hole, 2 channels functional diagrams 16? pin?dip 8? pin?dip 8? pin?dip through ?hole through ?hole through ?hole 2?channels 1?channel 2?channels note: ? dual?channel? devices? have? common? v cc ?and? ground.?single?channel?dip?has?an? enable?pin? 7.?? all? diagrams? are? top ? view. device marking 0.20 (0.008) 0.33 (0.013) 4.45 (0.175) max. 20.06 (0.790) 20.83 (0.820) 0.51 (0.020) max. 2.29 (0.090) 2.79 (0.110) 0.51 (0.020) min. 0.89 (0.035) 1.65 (0.065) 8.13 (0.320) max. 7.36 (0.290) 7.87 (0.310) 6n134 outline: 16-pin dip pkg note: dimensions in millimeters (inches). 3.81 (0.150) min. 5 7 6 8 1 2 1 0 1 1 9 g n d 1 3 2 4 1 6 1 4 1 5 1 3 v c c v o 1 v o 2 v c c v o u t v e g n d 1 2 3 4 1 3 2 4 8 6 7 5 v c c g n d v o 2 v o 1 8 7 6 5 8 pin dip through hole, 1 and 2 channels 3 . 8 1 ( 0 . 1 5 0 ) m i n . 4 . 3 2 ( 0 . 1 7 0 ) m a x . 9 . 4 0 ( 0 . 3 7 0 ) 9 . 9 1 ( 0 . 3 9 0 ) 0 . 5 1 ( 0 . 0 2 0 ) m a x . 2 . 2 9 ( 0 . 0 9 0 ) 2 . 7 9 ( 0 . 1 1 0 ) 0 . 5 1 ( 0 . 0 2 0 ) m i n . 0 . 7 6 ( 0 . 0 3 0 ) 1 . 2 7 ( 0 . 0 5 0 ) 8 . 1 3 ( 0 . 3 2 0 ) m a x . 7 . 3 6 ( 0 . 2 9 0 ) 7 . 8 7 ( 0 . 3 1 0 ) 0 . 2 0 ( 0 . 0 0 8 ) 0 . 3 3 ( 0 . 0 1 3 ) 7 . 1 6 ( 0 . 2 8 2 ) 7 . 5 7 ( 0 . 2 9 8 ) n o t e : d i m e n s i o n s i n m i l l i m e t e r s ( i n c h e s ) . note ?1.? qualifed? parts?only c o m p l i a n c e i n d i c a t o r , [ 1 ] d a t e c o d e , s u f f i x ( i f n e e d e d ) a q y y w w z x x x x x x x x x x x x x x x x x x x * 5 0 4 3 4 c o u n t r y o f m f r . a v a g o c a g e c o d e [ 1 ] a v a g o l o g o d s c c s m d [ 1 ] p i n o n e / e s d i d e n t a v a g o p / n d s c c s m d [ 1 ]
4 hermetic optocoupler options option description 100 surface ? mountable? hermetic? optocoupler?with?leads? trimmed? for?butt? joint? assembly.? this ?option?is? available? on? standard? commercial,?class?h?&?class?k? product?in?8?and?16?pin?dip?(see? drawings? below? for?details). 200 lead ?fnish?is?solder?dipped? rather?than?gold? plated.? this ?option?is? available?on? standard? commercial,?class?h? and?class?k? products?in?8?and?16?pin? dip.? dscc? drawing? part?numbers? contain? provisions? for?lead?fnish.? 300 surface ? mountable? hermetic? optocoupler?with?leads?cut?and? bent? for?gull?wing? assembly.? this ?option?is? avail - able?on? standard? commercial,?class?h?&?class?k? product?in?8?and?16?pin?dip?(see? drawings? below? for?details).? this ?option?has?solder?dipped? leads. solder ? contains? lead. 1 . 1 4 ( 0 . 0 4 5 ) 1 . 4 0 ( 0 . 0 5 5 ) 4 . 3 2 ( 0 . 1 7 0 ) m a x . 0 . 5 1 ( 0 . 0 2 0 ) m a x . 2 . 2 9 ( 0 . 0 9 0 ) 2 . 7 9 ( 0 . 1 1 0 ) 0 . 5 1 ( 0 . 0 2 0 ) m i n . 1 . 1 4 ( 0 . 0 4 5 ) 1 . 4 0 ( 0 . 0 5 5 ) 4 . 3 2 ( 0 . 1 7 0 ) m a x . 0 . 5 1 ( 0 . 0 2 0 ) m a x . 2 . 2 9 ( 0 . 0 9 0 ) 2 . 7 9 ( 0 . 1 1 0 ) 0 . 5 1 ( 0 . 0 2 0 ) m i n . 7 . 3 6 ( 0 . 2 9 0 ) 7 . 8 7 ( 0 . 3 1 0 ) 0 . 2 0 ( 0 . 0 0 8 ) 0 . 3 3 ( 0 . 0 1 3 ) n o t e : d i m e n s i o n s i n m i l l i m e t e r s ( i n c h e s ) . 1 . 4 0 ( 0 . 0 5 5 ) 1 . 6 5 ( 0 . 0 6 5 ) 4 . 5 7 ( 0 . 1 8 0 ) m a x . 0 . 5 1 ( 0 . 0 2 0 ) m a x . 2 . 2 9 ( 0 . 0 9 0 ) 2 . 7 9 ( 0 . 1 1 0 ) 0 . 5 1 ( 0 . 0 2 0 ) m i n . 0 . 5 1 ( 0 . 0 2 0 ) m i n . 4 . 5 7 ( 0 . 1 8 0 ) m a x . 0 . 5 1 ( 0 . 0 2 0 ) m a x . 2 . 2 9 ( 0 . 0 9 0 ) 2 . 7 9 ( 0 . 1 1 0 ) 1 . 4 0 ( 0 . 0 5 5 ) 1 . 6 5 ( 0 . 0 6 5 ) 9 . 6 5 ( 0 . 3 8 0 ) 9 . 9 1 ( 0 . 3 9 0 ) 5 m a x . 4 . 5 7 ( 0 . 1 8 0 ) m a x . 0 . 2 0 ( 0 . 0 0 8 ) 0 . 3 3 ( 0 . 0 1 3 ) n o t e : d i m e n s i o n s i n m i l l i m e t e r s ( i n c h e s ) .
5 absolute maximum ratings no? derating? required?up? to?+125c. parameter symbol min. max. units storage ? temperature t s -65 +150 c operating ? temperature t a -55 +125 c case ? temperature t c +170 c junction ? temperature t j +175 c lead ? solder? temperature 260? for?10?sec c peak ? forward? input? current (each? channel,?f1?ms? duration) i f(peak) 40 ma average ? input? forward? current?(each?channel) i f(avg) 20 ma input ? power? dissipation?(each?channel) 35 mw reverse ? input? voltage ?(each?channel v r 5 v supply? voltage ?(1? minute?maximum) v cc 7.0 v output ? current?(each?channel) i o 25 ma output ? voltage ?(each?channel) v o 7 v output ? power? dissipation?(each?channel) p o 40 mw package ? power? dissipation?(each?channel) p d 200 mw single channel product only enable? input? voltage v e 3.6 v note ? enable? pin? 7. ? an ? external ? 0.01? f? to ? 0.1? f? bypass ? capacitor ? must? be? connected? between? v cc ?and? ground? for?each? package? type. 8 pin ceramic dip single channel schematic esd classifcation mil-prf-38534 ?and? mil-std-883,? method?3015 acpl-560l/01l/0kl, ?5962-0824201 ( b),?class?1b acpl-5630l/31l/3kl, ?5962-0824202 ( a), ?class?3a acpl-2670l/72l/268kl, ?5962-0824203 ( ),?class?2 recommended operating conditions parameter symbol min. max. units input?current,?low?level,?each?channel i fl 0 250 a input?current,?high?level,?each?channel i fh 10 20 ma supply?voltage,?output v cc 3.0 3.6 v fan?out?(ttl?load)?each?channel n 6
6 electrical characteristics (t a = -55c to +125c, unless otherwise specifed) parameter symbol test conditions group a [13] sub - groups limits units fig. note min. typ.* max. high ? level output ? current i oh v cc ?=?3.3? v, ? v o ?=?3.3? v, i f ?=?250?a 1,?2,?3 6 250 a 1 1 low?level output?voltage v ol v cc ?=?3.3?v,?i f ?=?10?ma, i ol? (sinking)?=?10?ma 1,?2,?3 0.3 0.6 v 2 1,?8 current?transfer ratio h f ?ctr v o ?=?0.6?v,?i f ?=?10?ma, v cc ?=?3.3?v 1,?2,?3 100 % 1 logic ? high ? supply? current single channel i cch v cc ?=?3.3?v,?i f ?=?0?ma 1,?2,?3 5 11 ma 1 dual channel v cc ?=?3.3?v, i f1 ?=?i f2 ?=?0?ma 10 22 ma logic ? low supply? current single channel i ccl v cc ?=?3.3?v, i f ?=?20?ma 1,?2,?3 6 15 ma 1 dual channel v cc ?=?3.3?v, i f1 ?=?i f2? ?=?20?ma 12 30 ma input?forward voltage v f i f ?=?20?ma 1,?2 1.55 1.75 v 3 1 3 1.85 input?reverse breakdown? voltage bv r i r ?=?10?a 1,?2,?3 5 v 1 input-output leakage?current i i-o rh?f?65%,? t a ?=?25c t?=?5?s,? v i-o ?=?1500? vdc 1 1.0 a 2,?7 capacitance?between? input/?output c i-o f?=?1?mhz,?t c ?=?25c 4 1.0 4.0 pf 1,?3, 13 *all?typical?values?are?at?v cc ?=?3.3?v,?t a ?=?25c. recommended operating conditions (contd.) single?channel? product?only [10] parameter symbol min. max. units high?level?enable?voltage v eh 2.0 v cc v low?level?enable?voltage v el 0 0.8 v
7 electrical characteristics (contd) t a = -55c to +125c unless otherwise specifed parameter symbol test conditions group a [13] subgroups limits units fig. note min. typ.* max. propagation ? delay? time ? to? high? output? level t plh v cc ?=?3.3? v, ?r l ?=?510? , c l ?=?50? pf,?i f ?=?13?ma 9 43 100 ns 4,?5,?6 1,?5 10,?11 140 propagation ? delay? time ? to? low? output? level t phl 9 54 100 ns 10,?11 120 output?rise?time t lh r l ?=?510?,?c l ?=?50? pf,? i f ?=?13?ma 9,?10,?11 20 90 ns 1 output?fall?time t hl 8 40 common?mode? transient immunity?at? high?output level |cm h | v cm ?=?50?v?(peak), v cc ?=?3.3?v,? v o ?(min.)?=?2?v, r l ?=?510?,?i f ?=?0?ma 9,?10,?11 1000 >10000 v/s 7 1,?6, 13 common?mode transient immunity?at?low? output?level |cm l | v cm ?=?50?v?(peak), v cc ?=?3.3?v,? v o ?(max.)?=?0.8?v,? r l ?=?510?,??i f ?=?10?ma 9,?10,?11 1000 >10000 v/s 7 1,?6, 13 single channel product only low?level enable?current i el v cc ?=?3.3?v, v e ?=?0.5?v 1,?2,?3 -2.0 -0.54 ma high?level enable?voltage v eh 1,?2,?3 2.0 v 9 low?level enable?voltage v el 1,?2,?3 0.8 v *all?typical?values?are?at?v cc ?=?3.3?v,?t a ?=?25c. typical characteristics, t a = 25c, v cc = 3.3 v parameter sym. typ. units test conditions fig. note input ? capacitance c in 60 pf v f ?=?0? v, ?f?=?1? mhz 1 input ?diode? temperature coefcient ?v f ?t a -1.5 mv/c i f ?=?20?ma 1 resistance ? (input-output) r i-o 10 12 v i-o ?=?500? v 2 single channel product only propagation ? delay? time ?of enable? from? v eh ? to? v el t elh 32 ns r l ?=?510? ,?c l ?=?50?pf i f ?=?13?ma,? v eh ?=?3? v, v el ?=?0v 8,?9 1,?10 propagation ? delay? time ?of enable? from? v el ? to? v eh t ehl 28 ns 1,?11 dual channel product only input-input leakage ? current i i-i 0.5 na relative ? humidity?f?65% v i-i ?=?500? v, ?t?=?5?s 4 resistance ? (input-input) r i-i 10 12 v i-i ?=?500? v 4 capacitance ? (input-input) c i-i 0.55 pf f?=?1? mhz 4
8 notes: ? 1.? each ? channel. ? 2.? all ? devices ? are ? considered ? two-terminal ? devices; ? i i-o ? is? measured ? between ? all? input? leads? or? terminals ? shorted ? together ? and? all? output? leads? or? terminals ? shorted ? together. ? 3.? measured ? between ? each? input? pair? shorted ? together ? and? all? output? connections ? for ? that ? channel? shorted ? together. ? 4.? measured ? between ? adjacent ? input? pairs? shorted ? together ? for ? each? multichannel? device. ? 5.? t phl ? propagation ? delay ? is? measured ? from ? the? 50%? point ? on? the? leading? edge? of? the? input? pulse? to ? the? 1.5? v? point ? on? the? leading? edge? of? the? output? pulse. ? the ? t plh ? propagation ? delay ? is? measured ? from ? the? 50%? point ? on? the? trailing ? edge? of? the? input? pulse? to ? the? 1.5? v? point ? on? the? trailing ? edge? of? the? output? pulse. ? 6.? cm l ? is? the? maximum? rate ? of? rise ? of? the? common ? mode? voltage ? that ? can? be? sustained? with? the? output? voltage ? in? the? logic ? low ? state ? (v o ? ? 2.0? v). ? 7.? this ? is? a? momentary ? withstand? test, ? not? an? operating ? condition. ? 8.? it ? is? essential ? that ? a? bypass ? capacitor ? (0.01? to ? 0.1? f, ? ceramic) ? be? connected ? from ? v cc ? to ? ground. ? total ? lead? length? between ? both? ends? of? this? external ? capacitor ? and? the? isolator ? connections ? should? not? exceed ? 20? mm. ? ? 9.? no ? external ? pull? up? is? required ? for ? a? high? logic ? state ? on? the? enable? input. 10.? the ? t elh ? enable? propagation ? delay ? is? measured ? from ? the? 1.5? v? point ? on? the? trailing ? edge? of? the? enable? input? pulse? to ? the? 1.5? v? point ? on? the? trailing ? edge? of? the? output? pulse. 11.? the ? t ehl ? enable? propagation ? delay ? is? measured ? from ? the? 1.5? v? point ? on? the? leading? edge? of? the? enable? input? pulse? to ? the? 1.5? v? point ? on? the? leading? edge? of? the? output? pulse. 12.? standard ? commercial ? parts ? receive ? 100%? testing ? at ? 25c? (subgroups ? 1? and? 9).? class? h? and? k? parts ? receive ? 100%? testing ? at ? 25,? 125,? and? -55c? (subgroups ? 1? and? 9,? 2? and? 10,? 3? and? 11,? respectively). 13.? parameters ? are ? tested ? as? part ? of? device ? initial? characterization ? and? after ? design ? and? process ? changes. ? parameters ? are ? guaranteed ? to ? limits? specifed? for ? all? lots? not? specifcally? tested. figure 1. high level output current vs. tempera - ture. figure 2. input-output characteristics. figure 3. input diode forward characteristics. 0 2 0 4 0 6 0 8 0 1 0 0 - 6 0 - 4 0 - 2 0 0 2 0 4 0 6 0 8 0 1 0 0 1 2 0 1 4 0 t a - t e m p e r a t u r e - c i o h - h i g h l e v e l o u t p u t c u r r e n t - u a v c c = 3 . 3 v v o = 3 . 3 v i f = 2 5 0 a 0 1 2 3 4 5 1 2 3 4 5 6 7 i f - i n p u t d i o d e f o r w a r d c u r r e n t - m a v o - o u t p u t v o l t a g e - v 5 1 0 ? 1 k ? 4 k ? r l v c c = 3 . 3 v t a = 2 5 c
9 figure 4. test circuit for t phl and t plh .* figure 7. test circuit for common mode transient immunity and typical waveforms. figure 6. propagation delay vs. temperature. figure 5. propagation delay, t phl and t plh vs. pulse input current, i fh . g n d v c c i f 3 . 3 v v o d . u . t . r m i n p u t m o n i t o r i n g n o d e p u l s e g e n e r a t o r z o = 5 0 ? t h = 5 n s c l * r l * c l i n c l u d e s p r o b e a n d s t r a y w i r i n g c a p a c i t a n c e . v o 0 . 0 1 f b y p a s s v f f g n d v c c i i v c m 5 1 0 ? + 3 . 3 v o u t p u t v o m o n i t o r i n g n o d e + - p u l s e g e n . a b d . u . t . 0 . 0 1 f b y p a s s 0 2 0 4 0 6 0 8 0 1 0 0 1 2 0 - 6 0 - 4 0 - 2 0 0 2 0 4 0 6 0 8 0 1 0 0 1 2 0 1 4 0 t a - t e m p e r a t u r e - c p r o p a g a t i o n d e l a y - n s t p l h t p h l v c c = 3 . 3 v i f = 1 3 m a r l = 5 1 0 ? 0 2 0 4 0 6 0 8 0 1 0 0 1 2 0 1 0 1 1 1 2 1 3 1 4 1 5 1 6 1 7 1 8 1 9 2 0 i f - p u l s e i n p u t c u r r e n t - m a p r o p a g a t i o n d e l a y - n s v c c = 3 . 3 v r l = 5 1 0 ? t p l h t p h l t a = 2 5 c
10 figure 10. operating circuit for burn-in and steady state life tests. figure 8. test circuit for t ehl and t elh . figure 9. enable propagation delay vs. temperature. g n d v c c + 3 . 3 v d . u . t . i f = 1 3 m a p u l s e g e n e r a t o r z o = 5 0 ? t r = 5 n s c l * r l * c l i n c l u d e s p r o b e a n d s t r a y w i r i n g c a p a c i t a n c e . v e v o u t o u t p u t v e m o n i t o r i n g n o d e o u t p u t v o m o n i t o r i n g n o d e 0 . 0 1 f b y p a s s g n d v c c d . u . t . * t a = + 1 2 5 o c * a l l c h a n n e l s t e s t e d s i m u l t a n e o u s l y . v o c c o n d i t i o n s : i f = 2 0 m a v c c v i n + - ( e a c h o u t p u t ) ( e a c h i n p u t ) i o = 2 5 m a 0 . 0 1 f 2 0 0 ? 5 . 3 v ( e a c h o u t p u t ) + 5 . 5 v + 5 . 5 v 2 0 0 ? 0 1 0 2 0 3 0 4 0 5 0 6 0 7 0 8 0 - 6 0 - 4 0 - 2 0 0 2 0 4 0 6 0 8 0 1 0 0 1 2 0 1 4 0 t e - e n a b l e p r o p a g a t i o n d e l a y - n s t e h l t e l h t a - t e m p e r a t u r e - c v c c = 3 . 3 v v e h = 3 . 0 v v e l = 0 v i f = 1 3 m a
mil-prf-38534 class h, class k, and dscc smd test program avagos ? hi-rel ? opt o couplers ? are ? in ? compliance ? with ? mil-prf-38534 ? classes ? h ? and ? k. ? class ? h ? and ? class ? k? devices ? are ? also ? in ? compliance ? with ? dscc ? drawing ? 5962-08242. testing ? consists ? of? 100%? scree ning? and? quality ? confor - mance ? inspection ? to ? mil-prf-38534. for product information and a complete list of distributors, please go to our website: www.avagotech.com avago, avago technologies, and the a logo are trademarks of avago technologies limited in the united states and other countries. data subject to change. copyright ? 2005-2008 avago technologies limited. all rights reserved. av02-1327en - june 30, 2008

▲Up To Search▲

Price & Availability of ACPL-5601L-100

	To Download ACPL-5601L-100 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .